par Das, Sudipta;Riedel, Samuel;Naeim, Mohamed 
;Brunion, Moritz;Bertuletti, Marco;Benini, Luca LB;Ryckaert, Julien;Myers, James;Biswas, Dwaipayan;Milojevic, Dragomir
Référence IEEE transactions on very large scale integration (VLSI) systems
Publication Publié, 2024-10-06
;Brunion, Moritz;Bertuletti, Marco;Benini, Luca LB;Ryckaert, Julien;Myers, James;Biswas, Dwaipayan;Milojevic, Dragomir Référence IEEE transactions on very large scale integration (VLSI) systems
Publication Publié, 2024-10-06
Article révisé par les pairs
| Titre: |
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| Auteur: | Das, Sudipta; Riedel, Samuel; Naeim, Mohamed; Brunion, Moritz; Bertuletti, Marco; Benini, Luca LB; Ryckaert, Julien; Myers, James; Biswas, Dwaipayan; Milojevic, Dragomir |
| Informations sur la publication: | IEEE transactions on very large scale integration (VLSI) systems |
| Statut de publication: | Publié, 2024-10-06 |
| Sujet CREF: | Technologie informatique hardware |
| Informatique appliquée logiciel | |
| Electronique et électrotechnique | |
| Mots-clés: | 3-D integration |
| interconnect | |
| latency | |
| logic-on-logic (LoL) | |
| many-core | |
| performance and area (PPA) | |
| power | |
| system analysis | |
| system and technology co-optimization (STCO) | |
| thermal | |
| Note générale: | SCOPUS: ar.j |
| Langue: | Anglais |
| Identificateurs: | urn:issn:1063-8210 |
| info:doi/10.1109/TVLSI.2024.3467148 | |
| info:scp/85207776509 |
