Communications publiées lors de congrès ou colloques nationaux et internationaux (66)
  1. 37. Nelissen, G., Berten, V., Goossens, J., & Milojevic, D. (2010). An Optimal Multiprocessor Scheduling Algorithm without Fairness. Proceedings of the 31th IEEE Real-Time Systems Symposium (Work in Progress session - RTSS10-WiP) IEEE Real-Time Systems Symposium (Work in Progress session - RTSS10-WiP)(31)
  2. 38. Richard, A., Milojevic, D., Robert, F., Bartzas, A., Papanikolaou, A., Siozios, K., & Soudris, D. (2010). Fast Design Space Exploration Environment Applied on NoC's for 3D-Stacked MPSoC's. ARCS '10 - 23th International Conference on Architecture of Computing Systens 2010 International Conference on Architecture of Computing Systems(23: 22-23 October 2010: Hannover, Germany)
  3. 39. Perry, D., Marchal, P., & Milojevic, D. (2010). Case study: Definition and Pathfinding of a GPU. D43D: 2nd Design for 3D Silicon Integration Workshop Design for 3D Silicon Integration Workshop(2: EPFL, Lausanne, Switzerland)
  4. 40. Nelissen, G., Nélis, V., Goossens, J., & Milojevic, D. (2009). High-level simulation for enhanced context switching for real-time scheduling in MPSoCs. Junior Researcher Workshop on Real-Time Computing (pp. 47-50) (October 2009: Paris, France).
  5. 41. Milojevic, D., Radojcic, R., Carpenter, R., & Marchal, P. (2009). Pathfinding: a design methodology for fast exploration and optimisation of 3D-stacked integrated circuits. System-on-Chip, 2009 (pp. 118-123) International Symposium on System-on-Chip(5-7 October 2009: Tampere, Finland).
  6. 42. Milojevic, D., Carlson, T., Croes, K., Radojcic, R., Ragett, D., Seynhaeve, D., Van der Plas, G., & Marchal, P. (2009). Automated Pathfinding tool chain for 3D-stacked integrated circuits: Practical case study. 3D System Integration IEEE International Conference on 3D System Integration(28-30 September 2009: San Francisco, CA)
  7. 43. Nelissen, G., Nélis, V., Goossens, J., & Milojevic, D. (2009). High-Level Simulation for Enhanced Context Switching for Real-Time Scheduling in MPSoCs. Proceedings of the 3rd Junior Researcher Workshop on Real-Time Computing (pp. 47-50) Junior Researcher Workshop on Real-Time Computing(3: October 2009: Paris, France).
  8. 44. Milojevic, D. (2009). Design Methodologies and EDA Tools for 3D-Stacked Integrated Circuits. PhD School MUSICS (March 2009)
  9. 45. Milojevic, D. (2009). 3D-Stacked Integrated Circuits: Design Consequences, Architectural Aspects, Design Methodologies and Tools. ACES 2009
  10. 46. Milojevic, D. (2009). 3-D Integration from System Design Perspective. System-on-Chip, 2009 nternational Symposium on System-on-Chip(5-7 October 2009: Tampere, Finland)
  11. 47. Milojevic, D. (2009). A multi-objective and hierarchical exploration tool for SoC peformance estimation. Proceedings of HiPEAC Reconfigurable Computing Workshop HiPEAC Reconfigurable Computing Workshop
  12. 48. Richard, A., Vander Biest, A., Bartzas, A., Papanikolaou, A., Soudris, D., Milojevic, D., & Robert, F. (2009). A multi-criteria estimation tool for system-on-chip. Date'09 University Booth (Nice, France)
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