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Physical Design Solutions to Tackle FEOL/BEOL Degradation in Gate-level Monolithic 3D ICs

par Ku, Bon Woong;Debacker, Peter;Milojevic, Dragomir ;Raghavan, Praveen;Verkest, Diederik ;Thean, Aaron;Lim, Sung Kyu
Référence Proceedings of the 2016 International Symposium on Low Power Electronics and Design, ACM, page (76-81)
Publication Publié, 2016-08-01

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Titre:	Physical Design Solutions to Tackle FEOL/BEOL Degradation in Gate-level Monolithic 3D ICs
Auteur:	Ku, Bon Woong; Debacker, Peter; Milojevic, Dragomir; Raghavan, Praveen; Verkest, Diederik; Thean, Aaron; Lim, Sung Kyu
Informations sur la publication:	Proceedings of the 2016 International Symposium on Low Power Electronics and Design, ACM, page (76-81)
Statut de publication:	Publié, 2016-08-01
series:	ISLPED '16
Sujet CREF:	Technologie informatique hardware
	Technol. des composantes électroniques [microélectronique]
Mots-clés:	FEOL/BEOL Degradation, Gate-level Monolithic 3D IC, Low Temperature Manufacturing Process
Langue:	Anglais
Identificateurs:	urn:isbn:978-1-4503-4185-1
	info:doi/10.1145/2934583.2934622
	http://doi.acm.org/10.1145/2934583.2934622