par Yalcin, Gulay;Rethinagiri, Santhosh;Palomar, Oscar;Unsal, Osman;Cristal, Adrian;Milojevic, Dragomir
Référence 2016 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP), page (184-191)
Publication Publié, 2016-04-16
Publication dans des actes
Titre:
  • Exploring Energy Reduction in Future Technology Nodes via Voltage Scaling with Application to 10nm
Auteur:Yalcin, Gulay; Rethinagiri, Santhosh; Palomar, Oscar; Unsal, Osman; Cristal, Adrian; Milojevic, Dragomir
Informations sur la publication:2016 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP), page (184-191)
Statut de publication:Publié, 2016-04-16
Sujet CREF:Informatique appliquée logiciel
Technol. des composantes électroniques [microélectronique]
Mots-clés:parallel processing
power aware computing
computer system
energy consumption reduction
energy gain nullification
energy overheads
energy saving
error rate evaluation
fault recovery
frequency reduction
functional units
future-technology node
instruction reexecution
out-of-order architecture instruction level parallelism
performance degradation
performance impact reduction
safe margin
size 10 nm
voltage level
voltage reduction
Langue:Anglais
Identificateurs:info:doi/10.1109/PDP.2016.108