Study of hardware implementations of fast tracking algorithms

Song, Zixuan; De Lentdecker, Gilles; Dong, Jianmeng; Huang, G.; Léonard, Amaury; Robert, F.; Wang, D.; Yifan, Yang

doi:doi/10.1088/1748-0221/12/02/C02068

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Study of hardware implementations of fast tracking algorithms

par Song, Zixuan

;De Lentdecker, Gilles

;Dong, Jianmeng

;Huang, G.;Léonard, Amaury ;Robert, F.;Wang, D.;Yifan, Yang

Référence Journal of Instrumentation, 12, 2, C02068
Publication Publié, 2017-02

Article révisé par les pairs

Résumé :

Real-time track reconstruction at high event rates is a major challenge for future experiments in high energy physics. To perform pattern-recognition and track fitting, artificial retina or Hough transformation methods have been introduced in the field which have to be implemented in FPGAfirmware. In this notewe report on a case study of a possible FPGAhardware implementation approach of the retina algorithm based on a Floating-Point core. Detailed measurements with this algorithm are investigated. Retina performance and capabilities of the FPGA are discussed along with perspectives for further optimization and applications.

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